Proceedings, the 20th annual International Symposium on Computer Architecture

Proceedings, the 20th annual International Symposium on Computer Architecture

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Both hardware and software participate in the HPT trade-offs to provide a cost effective solution. The analysis and data ... R., Vitale.P., and Callister, J. Performance Evaluation of a Commercial Cache-Coherent Shared Memory Multiprocessor.


Title:Proceedings, the 20th annual International Symposium on Computer Architecture
Author: IEEE Computer Society. Technical Committee on Computer Architecture, Sigarch, Institute of Electrical and Electronics Engineers
Publisher:IEEE - 1993
ISBN-13:

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